10th International Symposium on Applied Reconfigurable Computing (ARC’2014)

Sunday, April 13
17:30 - 19:00	Registration
18:00 - 19:30	Welcome Cocktail at the Crowne Plaza Vilamoura Hotel
Monday, April 14
08:00 - 08:40	Registration
08:40 - 09:00	Welcome Session
09:00 - 10:00	Keynote Speaker: Technologies and Platforms for Cyberphysical Systems Giovanni De Micheli, from EPFL, Switzerland Chair: Marco Santambrogio, Politecnico di Milano, Italy
10:00 - 10:45	Coffee Break and Poster Session #1
10:45 - 12:30	Session M1: Applications Session Chair: Minoru Watanabe, Shizuoka University, Japan FPGA-Based Parallel DBSCAN Architecture Neil Scicluna, and Christos-Savvas Bouganis FPGA-Based High Performance AES-GCM Using Efficient Karatsuba Ofman Algorithm Karim M. Abdellatif, R. Chotin-Avot, and H. Mehrez Efficient Elliptic-Curve Cryptography Using Curve25519 on Reconfigurable Devices Pascal Sasdrich, and Tim Güneysu Accelerating Heap-based Priority Queue in Image Coding Application Using Parallel Index-aware Tree Access Yuhui Bai, Syed Zahid Ahmed, and Bertrand Granado
12:30 - 14:00	Lunch
14:00 - 15:20	Session M2: Methods, Frameworks and OS for Debug, Over-clocking and Relocation Session Chair: Michael Huebner, Ruhr-University Bochum (RUB), Bochum, Germany A Unified Framework for Over-Clocking Linear Projections on FPGAs Under PVT Variation Rui Policarpo Duarte, and Christos-Savvas Bouganis Relocatable Hardware Threads in Run-time Reconfigurable Systems Alexander Wold, Andreas Agne, and Jim Torresen Faster FPGA Debug: Efficiently Coupling Trace Instruments with User Circuitry Eddie Hung, Jeffery B. Goeders, and Steve J.E. Wilton
15:20 - 15:50	Coffee Break
15:50 - 17:10	Session M3: Memory Architectures Session Chair: Mazen A. R. Saghir, American University of Beirut (AUB), Lebanon On the impact of replacing a low-speed memory bus on the Maxeler platform, Using the FPGA's configuration infrastructure Karel Heyse, Dirk Stroobandt, Oliver Kadlcek, and Oliver Pell Towards Dynamic Cache and Bandwidth Invasion Carsten Tradowsky, Martin Schreiber, Malte Vesper, Ivan Domladovec, Maximilian Braun, Hans-Joachim Bungartz, and Jürgen Becker Stand-alone Memory Controller for Graphics System Tassadaq Hussain, Oscar Palomar, Osman S. Ünsal, Adrian Cristal, Eduard Ayguadé, Mateo Valero, and Amna Haider
17:10 - 19:30	Break
19:30 - 22:30	Barbecue at the Crowne Plaza Vilamoura Hotel

Tuesday, April 15
08:15 - 08:40	Registration
08:40 - 09:00	Announcements
09:00 - 10:00	Invited Speaker from Industry How to achieve IEC61508 Functional Safety and Security with FPGA and ZYNQ; architectures, methods and tools Giulio Corradi, Xilinx Inc., Munich, Germany Chair: Diana Goehringer, Ruhr-University Bochum (RUB), Bochum, Germany
10:00 - 10:45	Coffee Break and Poster Session #2
10:45 - 12:30	Session T1: EU Funded Projects Session Chair: M.D. Santambrogio, Politecnico di Milano, Italy DeSyRe: On-demand Adaptive and Recongurable Fault-tolerant SoCs? I. Sourdis, C. Strydis, A. Armato, C.S. Bouganis, B. Falsa, G.N. Gaydadjiev, S. Isaza, A. Malek, R. Mariani, S. Pagliarini, D. Pnevmatikatos, D.K. Pradhan, G. Rauwerda, R.M. Seepers, R.A. Shak, G. Smaragdos, D.Theodoropoulos, S. Tzilis, and M. Vavouras Effective Reconfigurable Design: the FASTER Approach D. N. Pnevmatikatos, T. Becker, A. Brokalakis, G. Gaydadjiev, W. Luk, K. Papadimitri-ou, I. Papaefstathiou, O. Pell, C. Pilato, D. Pau, M. D. Santambrogio, D. Sciuto, and D. Stroobandt HARNESS Project: Managing Heterogeneous Computing Resources for a Cloud Platform José G.F. Coutinho, Oliver Pell, Eoghan O'Neill, Peter Sanders, John McGlone, Paul Grigoras, Wayne Luk and Carmelo Ragusa SAVE: Towards Efficient Resource Management in Heterogeneous System Archi-tectures G. Durelli, M. Coppola, K. Djafarian, G. Kornaros, A. Miele, M. Paolino, O. Pell, C. Plessl, M.D. Santambrogio, and C. Bolchini Data Parallel Application Adaptivity and System-Wide Resource Management in Many-Core Architectures Giuseppe Massari, Edoardo Paone, Michele Scandale, Patrick Bellasi, Gianluca Palermo, Vittorio Zaccaria, Giovanni Agosta, William Fornaciari, and Cristina Silvano
12:30 - 14:00	Lunch
14:00 - 15:20	Session T2: Methodologies and Tools I Session Chair: Gianluca Palermo, Politecnico di Milano, Italy Evaluating High-level Program Invariants Using Reconfigurable Hardware Joonseok Park, and Pedro Diniz Automated Data Flow Graph partitioning for a hierarchical approach to wordlength optimization Enrique Sedano, Daniel Menard, and Juan Antonio López Partitioning and Vectorizing Binary Applications for a Reconfigurable Vector Computer Tobias Kenter, Gavin Vaz, and Christian Plessl
15:20 - 15:50	Coffee Break and Poster Session #4
15:50 - 17:10	Session T3-A: Remote FPGA Lab Environments Session Chair: Jose Gabriel de Figueiredo Coutinho, Imperial College of London, UK Online Learning, Assessment and Prototyping of Digital Systems Using Remote Reconfigurable Computing Fearghal Morgan, National University of Ireland, Galway eDiViDe: a remote learning platform for FPGA design Nele Mentens, Jochen Vandorpe, KU Leuven, Belgium
15:50 – 18:00	Session T3-B: ALMA Project Special Session (From Scilab to High Performance Embedded Multicore Systems: The ALMA Approach) Session Chair: Jürgen Becker, KIT, Germany, Timo Stripf, KIT, Germany Introducing the ALMA Approach for Compiling Scilab to Multi-Core Architectures Jürgen Becker / Timo Stripf, Karlsruhe Institute of Technology, Germany Multi-Core Architectures targeted by ALMA Flow Kim Sunesen, Recore Systems, The Netherlands ADL-based Fine-Grain Optimizations within the ALMA Flow Ali El Moussawi, Universite de Rennes I, INRIA Research Institute, France Mapping and Scheduling Coarse Grain Hierarchical Task Graphs on Multi-core Architectures Panayiotis Alefragis, Technological Educational Institute of Western Greece, Greece Demonstration of the Integrated ALMA Toolflow Timo Stripf, Ali El Moussawi, Panayiotis Alefragis
18:00 - 19:30	Break
19:30 - 22:30	Gala Dinner at the Crowne Plaza Vilamoura Hotel

Wednesday, April 16
08:15 - 08:40	Registration
08:40 - 09:00	Announcements
09:00 - 10:00	Invited Speaker from Academia Doing Monte-Carlo in 5 micro-seconds: Using FPGAs to go where GPUs can’t David Thomas, Imperial College London, UK Chair: Dirk Stroobandt, Ghent University, Belgium
10:00 - 10:45	Coffee Break and Poster Session #3
10:45 - 12:05	Session W1: Architectures Session Chair: Pedro Diniz, USC Information Sciences Institute, USA Enhanced radiation tolerance of an optically reconfigurable gate array by exploiting an inversion/ non-inversion implementation Takashi Yoza, and Minoru Watanabe Hardware-Accelerated Data Compression in Low-Power Wireless Sensor Networks Andreas Engel, and Andreas Koch OCP2XI Bridge: An OCP to AXI protocol bridge Zdravko Panjkov, Juergen Haas, Martin Aigner, Herbert Rosmanith, Tianlun Liu, Roland Poppenreiter, Andreas Wasserbauer, and Richard Hagelauer
12:05 - 12:30	Closing Session and Best Paper Award
12:30 - 14:00	Lunch
14:30 - 18:00	Social Event (A boat trip through the waters of the Algarve Coast, if the weather allows it)

Poster Presentations

Poster Session #1: Applications

Monday, April 14: 10:00 - 10:45

Session Chairs: Eduardo Marques, ICMC/USP, Brazil

FPGA Implementation of a Video Based Abnormal Action Detection System with Real-time Cubic Higher Order Local Auto-correlation Analysis

Kaoru Hamasaki, Keisuke Dohi, Yuichiro Shibata, and Kiyoshi Oguri

Synthesizable Multicore Platform for Microwave Imaging

Pascal Schleuniger, and Sven Karlsson

An Efficient Implementation of the Adams-Hamilton's Demosaicing Algorithm in FPGAs

Jalal Khalifat, Ali Ebrahim, and Tughrul Arslan

FPGA Design of Delay-Based Digital Effects for Electric Guitar

Pablo Calleja, Gabriel Caffarena, and Ana Iriarte

Design Space Exploration of a Particle Filter Using Higher-order Functions

Rinse Wester, and Jan Kuper

Simulation of Complex Biochemical Pathways in 3D Process Space via Heterogeneous Computing Platform: Preliminary Results

Jie Li, Amin Salighehdar, and Narayan Ganeson

Poster Session #2: Architectures

Tuesday, April 15: 10:00 - 10:45

Session Chair: João Canas Ferreira, University of Porto, Portugal

Efficient Buffer Design and Implementation for Wormhole Routers on FPGAs

Taimour Wehbe, and Xiaofang Wang

MicroACP - A Fast and Secure Reconfigurable Asymmetric Crypto-Processor

Christoph Pöpper, Oliver Mischke, and Tim Güneysu

ARABICA: A Reconfigurable Arithmetic Block for ISA Customization

Ihsen Alouani, Mazen A.R. Saghir, and Smail Niar

Built-in 3-Dimensional Hamming Multiple-Error Correcting Scheme to Mitigate

Radiation Effects in SRAM-Based FPGAs

B. Chagun Basha, Stanislaw J.Piestrak, and Sébastien Pillement

Adapting Processor Grain via Reconfiguration

Jecel Assumpção Jr, Merik Voswinkel, and Eduardo Marques

Instruction Set Optimization for Application Specific Processors

Max Ferger, and Michael Huebner

Poster Session #3: Methodologies and Tools

Wednesday, April 16: 10:00 - 10:45

Session Chair: João Bispo, University of Porto, Portugal

A Dataflow Inspired Programming Paradigm for Coarse-Grained Reconfigurable Arrays

Anja Niedermeier, Jan Kuper, and Gerard J.M. Smit

Thread Shadowing: Using Dynamic Redundancy on Hybrid Multi-cores for Error Detection

Sebastian Meisner, and Marco Platzner

Diffusion-Based Placement Algorithm for Reducing High Interconnect Demand in Congested Regions of FPGAs

Ali Asghar, and Husain Parvez

GPU vs FPGA : A Comparative Analysis for Non-standard Precision

Umar Minhas, Samuel Bayliss, and George A. Constantinides

Instruction Extension and Generation for Adaptive Multicore Processors

Chao Wang, Xi Li, Huizhen Zhang, Liang Shi, and Xuehai Zhou

Poster Session #4: EU-Funded Projects

Tuesday, April 15: 15:20 - 15:50

Session Chair: Marco D. Santambrogio, Politecnico di Milano, Italy

DeSyRe: on-demand Adaptive and Recongurable Fault-tolerant SoCs?

I. Sourdis, C. Strydis, A. Armato, C.S. Bouganis, B. Falsa, G.N. Gaydadjiev, S. Isaza, A. Malek, R. Mariani, S. Pagliarini, D. Pnevmatikatos, D.K. Pradhan, G. Rauwerda, R.M. Seepers, R.A. Shak, G. Smaragdos, D.Theodoropoulos, S. Tzilis, and M. Vavouras

Effective Reconfigurable Design: the FASTER Approach

D. Pnevmatikatos, T. Becker, A. Brokalakis, G. Gaydadjiev, W. Luk, K. Papadimitri-ou, I. Papaefstathiou, O. Pell, C. Pilato, D. Pau, M. D. Santambrogio, D. Sciuto, and D. Stroobandt

HARNESS Project: Managing Heterogeneous Compute Resources for a Cloud Platform

José G.F.Coutinho, Oliver Pell, Eoghan O'Neill, Peter Sanders, John McGlone, Paul Grigoras, Wayne Luk and Carmelo Ragusa

Profile-Guided Compilation of Scilab Algorithms for Multiprocessor Systems

Juergen Becker, Thomas Bruckschloegl, Oliver Oey, Timo Stripf, George Goulas, Nick Raptis, Christos Valouxis, Christos Gogos, Panayiotis Alefragis, Nikolaos S. Voros

SAVE: Towards Efficient Resource Management in Heterogeneous System Archi-tectures

G. Durelli, M. Coppola, K. Djafarian, G. Kornaros, A. Miele, M. Paolino, O. Pell, C. Plessl, M.D. Santambrogio, and C. Bolchini

Data Parallel Application Adaptivity and System-Wide Resource Management in Many-Core Architectures

Giuseppe Massari, Edoardo Paone, Michele Scandale, Patrick Bellasi, Gianluca Palermo, Vittorio Zaccaria, Giovanni Agosta, William Fornaciari, and Cristina Silvano

Thursday, April 17
08:30 - 10:00	Hands-on: Online Learning, Assessment and Prototyping of Digital Systems Using Remote Reconfigurable Computing Fearghal Morgan, National University of Ireland, Galway
10:00 - 10:30	Coffee-Break
10:30 - 12:30	Hands-on: eDiViDe: A Remote Learning Platform for FPGA Design Nele Mentens, Jochen Vandorpe, KU Leuven, Belgium